1. Technical Field
The invention relates generally to communication devices, and more particularly, it relates to connectivity of the various components and circuits within such communication devices.
2. Description of Related Art
Data communication systems have been under continual development for many years. Within such communication systems, there are many communication devices included therein that that include various integrated circuits, chips, modules, and functional blocks. These communication devices may be transceivers, transmitters, receivers, or even other peripheral type devices. Within these communication devices, various chips are typically mounted on a PCB (Printer Circuit Board) and are typically communicatively coupled via the PCB to other chips that are mounted thereon. The manner in these various chips communicatively couple to the PCB can introduce some serious deficiencies to the overall communication device's performance.
FIG. 1A is a diagram illustrating a prior art embodiment of a typical interface between an integrated circuit and a PCB (shown using a side view). As shown in this embodiment, a chip (e.g., which may alternatively be referred to as an encapsulated chip, package, or an integrated circuit) typically includes a die (e.g., a silicon substrate) on which a certain amount of circuitry is emplaced. This circuitry is referred to in the diagram as on substrate circuitry. Certain portions of the circuitry within this chip must communicatively couple to the PCB on which the chip is situated to transmit and receive signals, to couple voltage power levels, ground potential levels, and so on. To do this, certain nodes of the on substrate circuitry need to be communicatively coupled to the chip exterior and then to a PCB pad or trace. From there, the signal may be communicatively coupled to another appropriate portion of the PCB and, when appropriate, to another chip that may also be resident thereon. Sometimes, these signals are communicatively coupled via a backplane, or some other interface, to another device or other PCB that may also include various chips. Regardless of the final destination of how and where the communicatively coupling of these signals is to be made from the on substrate circuitry within the chip to a PCB pad or trace, the appropriate node within the on substrate circuitry must be communicatively coupled to the exterior of the chip.
The typical manner in which this is performed is to have a bond wire communicatively couple to the on substrate circuitry to the interface of the chip. From there, a pin typically extends from the interface of the chip to a PCB pad or trace on the PCB. An alternative means by which the connectivity of the bond wire between the on substrate circuitry and the exterior of the chip may be made, in an effort to reduce the impedance of the bond wire interface, is to employ two separate bond wires that are connected in parallel with one another and separated by a capacitor. This inherently reduces the impedance of the interface between the on substrate circuitry and the exterior of the chip as follows:
Z1=impedance of a 1st bond wire
Z2=impedance of a 2nd bond wire
ZTOT=total impedance of the 1st bond wire and the 2nd bond wire in parallel
      1    ZTOT    =            1              Z        ⁢                                  ⁢        1              +          1              Z        ⁢                                  ⁢        2            The capacitor between the 1st and 2nd bond wires provides for decoupling of the two bond wire paths.
FIG. 1B is a diagram illustrating the same prior art embodiment of a typical interface between an integrated circuit and a PCB (shown using a top view). This embodiment shows a side view of the very same components as within the previous diagram. As can be seen, a chip may have several (sometimes hundreds or even more) or pins around the periphery of the chip. Each of these pins on the chip may communicatively couple to a PCB pad or trace for subsequent coupling to another location either on this same PCB or to another location.
Within these and other similar type communication devices, the communicatively coupling between the on substrate circuitry within chips to the PCBs on which they are situated may be performed in a way that can cause problems within certain types of communication systems. For example, within the wireless communication system context, the bond wires employed therein actually act as inductors because of the relatively long lengths of the bond wires involved. In some instances, the total inductance of such of these bond wires can approach 2-4 nH (nano-Henries). These relatively large amounts of inductance can compete and interfere with the on-chip devices. In some instances, these relatively large amounts of inductance of the bond wires actually can approach the relative values of the on-chip elements (in terms of magnitude of overall impedance).
As mentioned above, within the wireless communication system context, this can be exceedingly problematic. Looking at one example of a WLAN (Wireless Local Area Network) communication system operating according to one of the IEEE (Institute of Electrical & Electronics Engineers) 802.11 standards or recommended practices whose RF (Radio Frequency) carrier frequency, f, is within the 2.4 GHz (Giga-Hertz) frequency range, the inductive-related impedance of these bond wires can be quite significant. For example, the associated impedance, ZL, of an inductor having inductance, L having a value of 1 nH, is provided as follows:ZL=jωL=j2πfL=j2π(2.4×109)(1×10−9)=j·15 ΩThat is to say, for a bond wire having an inductance of approximately 1 nH, and when the chip operates within a wireless communication system having an RF carrier frequency of approximately 2.4 GHz, the magnitude of the inductive-related impedance is quite significant (e.g., approximately 15 Ω). This magnitude is very close to the magnitudes of many of the elements within such a communication device that may operate within such a wireless communication system. In some instances, this impedance magnitude of approximately 15 Ω is even 2 or 3 times larger than some of the impedances of the various elements within the chip. In other instances, this impedance magnitude of approximately 15 Ω is nearly half or a third the magnitude of the impedance of some other elements within the chip. For one comparison example, an antenna employed within such wireless communication systems may have a characteristic impedance of approximately 30 Ω to 45 Ω with respect to ground. In such an instance, the bond wire's impedance magnitude of approximately 15 Ω is approximately a half or third of the antenna's characteristic impedance of approximately 30 Ω to 45 Ω with respect to ground. In an instance where the inductance of the bond wire is double, or even triple, this illustrative example value of 1 nH, then the impedance of the bond wire can be approximately equal in magnitude to that of the antenna's characteristic impedance.
When communicatively coupling chips to PCBs using this PA approach of bond wires extending from the on substrate circuitry to the chip exterior, this undesirably generated inductive-related impedance can cause significant deleterious effects in the overall operation of the communication device. A great deal of interference and reduction of performance of the communication device may be experienced when using these prior art approaches. Clearly, there is a need in the art for a more effective and efficient way of communicatively coupling a chip to the pads and/or traces on a PCB on which the chip may be situated.